config SCHED_SMT
bool "SMT (Hyperthreading) scheduler support"
depends on X86_HT
- depends on !X86_XEN
help
SMT scheduler support improves the CPU scheduler's decision making
when dealing with Intel Pentium 4 chips with HyperThreading at a
pushl %eax # fake return address
jmp start_kernel
-L6:
- jmp L6 # main should never return here, but
- # just in case, we know what happens.
#define HYPERCALL_PAGE_OFFSET 0x1000
.org HYPERCALL_PAGE_OFFSET
mcl++;
}
- if (unlikely(prev->io_bitmap_ptr || next->io_bitmap_ptr)) {
+ if (unlikely(test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)
+ || test_tsk_thread_flag(next_p, TIF_IO_BITMAP))) {
iobmp_op.bitmap = (char *)next->io_bitmap_ptr;
iobmp_op.nr_ports = next->io_bitmap_ptr ? IO_BITMAP_BITS : 0;
mcl->op = __HYPERVISOR_physdev_op;
bool "IBM Calgary IOMMU support"
default y
select SWIOTLB
- depends on PCI && EXPERIMENTAL
+ depends on PCI && !X86_64_XEN && EXPERIMENTAL
help
Support for hardware IOMMUs in IBM's xSeries x366 and x460
systems. Needed to run systems with more than 3GB of memory
((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#define __HAVE_ARCH_GATE_AREA 1
-
#include <asm-generic/memory_model.h>
#include <asm-generic/page.h>
})
#define write_cr4(x) \
- __asm__ __volatile__("movl %0,%%cr4": :"r" (x));
+ __asm__ __volatile__("movl %0,%%cr4": :"r" (x))
/*
* Clear and set 'TS' bit respectively